W2L14D155MAT1A [KYOCERA AVX]
InterDigitated Cap;型号: | W2L14D155MAT1A |
厂家: | KYOCERA AVX |
描述: | InterDigitated Cap |
文件: | 总2页 (文件大小:413K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IDC Low Inductance Capacitors (RoHS)
IDC (InterDigitated Capacitors) 0306/0612/0508
GENERAL DESCRIPTION
Inter-Digitated Capacitors (IDCs) are used for both semiconductor package and
board level decoupling. The equivalent series inductance (ESL) of a single capacitor
or an array of capacitors in parallel determines the response time of a Power
Delivery Network (PDN). The lower the ESL of a PDN, the faster the response time. A
designer can use many standard MLCCs in parallel to reduce ESL or a low ESL Inter-
Digitated Capacitor (IDC) device. These IDC devices are available in versions with a
maximum height of 0.95mm or 0.55mm.
0612
+
–
+
–
IDCs are typically used on packages of semiconductor products with power levels
of 15 watts or greater. Inter-Digitated Capacitors are used on CPU, GPU, ASIC, and
ASSP devices produced on 0.13μ, 90nm, 65nm, and 45nm processes. IDC devices
are used on both ceramic and organic package substrates. These low ESL surface
mount capacitors can be placed on the bottom side or the top side of a package
substrate. The low profile 0.55mm maximum height IDCs can easily be used on the
bottom side of BGA packages or on the die side of packages under a heat spreader.
0508
+
–
+
–
IDCs are used for board level decoupling of systems with speeds of 300MHz or
greater. Low ESL IDCs free up valuable board space by reducing the number of
capacitors required versus standard MLCCs. There are additional benefits to
reducing the number of capacitors beyond saving board space including higher
reliability from a reduction in the number of components and lower placement costs
based on the need for fewer capacitors.
0306
TYPICAL IMPEDANCE
10
The Inter-Digitated Capacitor (IDC) technology was developed by AVX. This is the
second family of Low Inductance MLCC products created by AVX. IDCs are a cost
effective alternative to AVX’s first generation low ESL family for high-reliability
applications known as LICA (Low Inductance Chip Array).
MLCC_1206
LICC_0612
1
0.1
AVX IDC products are available with a lead-free finish of plated Nickel/Tin.
IDC_0612
0.01
0.001
1
10
100
1000
Frequency (MHz)
HOW TO ORDER
W
3
L
1
6
D
225
M
A
T
3
A
Style IDC Case
Low
Inductance
Number of Voltage Dielectric Capacitance Capacitance Failure Termination Packaging
Thickness
Max. Thickness
mm (in)
A=Standard
S=0.55 (0.022)
4 = 4V
6 = 6.3V
Z = 10V
Y = 16V
3 = 25V
C = X7R
D = X5R
Z = X7S
T =Plated Ni
and Sn
Available
1=7" Reel
3=13" Reel
Size
Terminals
1 = 8 Termi-
nals
Code (In pF)
2 Sig. Digits +
Number of
Zeros
Tolerance
Rate
2 = 0508
3 = 0612
4 = 0306
M = ±20%
A = N/A
NOTE: Contact factory for availability of Termination and Tolerance Options for Specific Part Numbers.
PERFORMANCE CHARACTERISTICS
Capacitance Tolerance ±20% Preferred
No problems observed after 2.5 x RVDC for 5
seconds at 50mA max current
Dissipation Factor
X7R = -55°C to +125°C
X5R = -55°C to +85°C
X7S = -55°C to +125°C
Operation
CTE (ppm/C)
12.0
Temperature Range
Thermal Conductivity
4-5W/M K
Temperature
Coefficient
Voltage Ratings
±15% (0VDC), ±22% (X7S)
Terminations
Available
Plated Nickel and Solder
4, 6.3, 10, 16, 25 VDC
≤ 6.3V = 6.5% max;
Dissipation Factor
10V = 5.0% max;
≥ 16V = 3.5% max
Insulation Resistance
(@+25°C, RVDC)
100,000MΩ min, or 1,000MΩ per μF
min.,whichever is less
The Important Information/Disclaimer is incorporated in the catalog where these specifications came from or
available online at www.avx.com/disclaimer/ by reference and should be reviewed in full before placing any order.
80
IDC Low Inductance Capacitors (RoHS)
IDC (InterDigitated Capacitors) 0306/0612/0508
SIZE
W4 = 0306
0.55
W2 = Thin 0508
0.55.
W2 = 0508
0.95
W3= Thin 0612
0.55
W3 = 0612
0.95
W3 = THICK 0612
1.22
Max.
mm
Thickness (in.)
(0.022)
(0.022)
(0.037)
(0.022)
(0.037)
(0.048)
WVDC
4
6.3
4
6.3 10 16 25
4
6.3 10 16 25
4
6.3 10 16
4
6.3 10 16 25
4
6.3 10 16
Cap (μF) 0.010
0.022
0.033
0.047
0.068
0.10
0.22
0.33
0.47
0.68
1.0
1.5
2.2
3.3
Consult factory for
additional requirements
PHYSICAL DIMENSIONS AND PAD LAYOUT
= X7R
= X5R
= X7S
PAD LAYOUT
DIMENSIONS
PHYSICAL CHIP DIMENSIONSMILLIMETERS (INCHES)
SIZE
W
L
BW
BL
P
SIZE
A
B
C
D
E
1.60 ± 0.20
0.82 ± 0.10
0.25 ± 0.10
0.20 ± 0.10
0.40 ± 0.05
0.38 0.89
1.27
0.20
0.40
0306
0306
(0.063 ± 0.008) (0.032 ± 0.006 (0.010 ± 0.004) (0.008± 0.004) (0.015 ± 0.002)
2.03 ± 0.20 1.27 ± 0.20 0.30 ± 0.10 0.25 ± 0.15 0.50 ± 0.05
(0.080 ± 0.008) (0.050 ± 0.008) (0.012 ± 0.004) (0.010± 0.006) (0.020 ± 0.002)
3.20 ± 0.20 1.60 ± 0.20 0.50 ± 0.10 0.25 ± 0.15 0.80 ± 0.10
(0.126 ± 0.008) (0.063 ± 0.008) (0.020 ± 0.004) (0.010 ± 0.006) (0.031 ± 0.004)
(0.015) (0.035) (0.050) (0.008) (0.015)
0.64 1.27
(0.025) (0.050) (0.075) (0.011) (0.020)
0.89 1.65 2.54 0.45 0.80
(0.035) (0.065) (0.010) (0.018) (0.031)
1.91
0.28
0.50
0508
0612
0508
0612
The Important Information/Disclaimer is incorporated in the catalog where these specifications came from or
available online at www.avx.com/disclaimer/ by reference and should be reviewed in full before placing any order.
81
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